1.  [Software Modeling](Fall/01_Software_Modeling.pdf)
    - History of software modeling
    - Computer Science Stack: HW & SW layouts, ISA
    - CISC vs RISC
    - RISC-V RV32I Introduction & Overview
    - QEMU usage

2.  [Simple Interpreter](Fall/02_Interpreters.pdf)
    - Interpretation insights
    - Basic CPU Architectural state
    - Simple interpreters and its optimizations
    - Semihosting
    - TOY ISA Introduction & Overview

3.  [Decoder](Fall/03_Ruby_Intro.pdf)
    - Introduction into Ruby Language
    - Metaprogramming and DSL Intro

4.  [ELF](Fall/04_ELF.pdf)
    - Virtual Memory
    - Executable and Linkable Format
    - Review Linux address space
    - elfio usage example

5.  [Advanced Simulation Techniques](Fall/05_DBT.pdf)
    - Introduction into binary translation techniques
    - Static binary translation and its optimizations
    - Dynamic binary translation, its application and optimizations
    - SMC Problem
    - Commit & Patch (Template Translation)
    - Direct Execution

6.  [Architecture Description Language](Fall/06_ADL.pdf)
    - Automated Machine Readable specification and its application
    - Automatically Generated Simulators
    - Automatization of Decoder Implementation
    - Decoders in real simulators

7.  [Memory Management Unit](Fall/07_MMU.pdf)
    - Motivation
    - RISC-V example (Sv32)
    - TLB
    - Exception Levels
    - RISC-V System Registers
    - Exceptions Handling

8.  [Trace Driven Simulation](Fall/08_TDS.pdf)
    - Introduction into trace technology and its application
    - Definition of trace-driver simulation
    - ChampSim Introduction & Overview

9. [Full-System Simulation](Fall/09_FSS.pdf)
    - SE vs FS simulation mode
    - Introduction into DES (Discrete Event Model)
    - Full-System Simulation and Event-driven model

10. [Parallel Simulation](Fall/10_Parallel_simulation.pdf)
    - Multicore CPU simulation with PDES (Parallel Discrete Event Model)
    - Distributed Shared Memory
    - Event queue in Parallel Simulation
    - Optimistic Models

-------------------

11. [Classification](Spring/11_Classification_n_Protea_Intro.pdf)
    - Simulation Classification Survey
    - Introduction into Protea Framework
    - Cooperation Project Rules

12. [Testing](Spring/12_13_Testing.pdf)
    - Unit Testing
    - Automated Testing and its application
    - Fuzzing
    - Co-simulation

13. [Caches](Spring/14_Caches.pdf)
    - CPU Test Generation
    - Static Symbolic Execution
    - Coverage

14. [Caches](Spring/14_Caches.pdf)
    - Introduction into the concept and structure of caches
    - Cache memory modeling and its corner cases
    - Cache Coherence Protocols
    - Prefetching (HW/SW)

15. [Digital Logic](Spring/15_Digital_Logic.pdf) (based Digital Design and Computer Architecture)
    - Digital Logic Level
    - Introduction into Analogue electronics
    - Introduction into Digital Logic
    - Sequential & Combination Logic
    - Functional Units
    - Memory

16. [Pipeline](Spring/16_Pipeline.pdf) (based Digital Design and Computer Architecture)
    - uArch Level
    - Single Cycle RISC-V processor
    - Multi Cycle RISC-V processor
    - Pipeline RISC-V processor
    - O3 RISC-V processor

17. [Cycle-Accurate Models](Spring/17_Device_Descritption.pdf)
    - Introduction into Cycle-Accurate models
    - CA models software implementation details
    - gem5 Introduction & Overview

18. [System Description Overview](Spring/17_System_Descritption.pdf)
    - Introduction into System Description Languages (SDL)
    - SystemC
    - DML
    - Current State
    - Introduction into Hardware Description Languages
    - Verilog
    - Simulating HDL with Verilator
    - Introduction into Protea Language of Devices (PLoD)


19. [FP & SIMD Introduction](Spring/19_FP_n_SIMD.pdf)
    - History
    - AArch64 FP & SIMD
    - RVV
    - Vectorization and its application